1. Field of the Invention
The present invention relates to an operation control circuit of a power supply unit used in a memory device, and more particularly to an operation control circuit of a power supply unit capable of making a power supply unit operate even in a section where a row address strobe (hereinafter is referred to as /RAS, hereinafter) signal that is one of control signals of a memory device does not operate.
2. Description of the Prior Art
In general, an operation control circuit of a power supply unit is used for supplying power to a memory device in response to a given control signal.
As shown in FIG. 1, a conventional operation control circuit of a power supply unit generates an actuating signal (act1) for actuating an internal power supply unit only in an operating section of /RAS. Accordingly, a signal and data access signal, etc., operating in a section where the /RAS does not operate can not be supplied with sufficient power and thereby, a speed delay is caused.